Transistor Characterization
Transistor IV: Electrical characterization.
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Scanning Electron Microscopy (SEM) and Transmission Electron Microscopy (TEM) analyses are often the first - and sometimes preferred - techniques for examining transistor structures in an integrated circuit. However, these conventional physical techniques can only provide "some" of the information needed to fully understand the compromises in process design.
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Strain engineering.
Today, strain engineering - electrical characterization - is Chipworks' preferred method for analysis and we now have SEM-based capabilities to measure state-of-the-art sub-45 nm gate length transistors. Manual probing of transistors on a deprocessed integrated circuit has been used for some time to extract the DC electrical parameters of the transistors. Now SEM based probe stations has extended this capability to sub 45 nm gate length devices.
TESTTEST
Parameters for CMOS transistors:
- Threshold voltages
- Transconductance
- Ion/Ioff
- Body effect factor
- Punch-through voltage
- Subthreshold swing
- Gate leakage currents
Chipworks' measurement capabilities also include the DC characteristics of bipolar transistors, among others - and are provided in our comprehensive product reports.
Related Capabilities & Resources: